JobPosting
title: High Speed IP PHY Applications Principal Engineer / Manager
description: You will be a High Speed IP PHY Applications Principal Engineer / Manager at Synopsys, the leader in engineering solutions from silicon to systems. Your role will involve providing technical support to customers integrating DesignWare USB Mixed Signal PHY IP, troubleshooting customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing in USB PHY and SoC integration contexts. Key responsibilities include: Providing technical support to customers integrating DesignWare USB Mixed Signal PHY IP Troubleshooting customer issues across synthesis, static timing analysis, design-for-test, and clock domain crossing Guiding customers through USB 2.0, USB 3.x, and Type-C implementation considerations and design tradeoffs Collaborating closely with the Korea AE team and Synopsys R&D and product teams to escalate complex issues Delivering technical presentations and integration best practices to customer engineering teams Traveling occasionally to customer sites across Korea and the region to support critical milestones The impact you will have includes: Enabling customer success on high-stakes tapeouts by resolving USB PHY integration issues Reducing time-to-silicon by providing clear, actionable guidance during integration, constraints closure, and silicon bring-up Building deep technical relationships with leading semiconductor companies in Korea Shaping future IP releases by channeling real customer pain points back into the product team Requirements: Bachelor's or Master's in Electrical Engineering or Computer Engineering with 10 to 20+ years of ASIC design, verification, or SoC integration experience Strong working knowledge of synthesis, static timing analysis, design-for-test, and clock domain crossing Ability to work independently and drive ambiguous, customer-driven issues to resolution Excellent communication skills in Korean and English USB 2.0, USB 3.x, Type-C, or USB PHY integration experience is a strong plus Broader high-spe…
date posted: 2026-07-23T16:14:16.429Z
valid through: 2026-09-30T21:01:07.612Z
direct apply: false
occupational category: Engineering
industry: Technology
skills: ASIC design
skills: verification
skills: SoC integration
skills: synthesis
skills: static timing analysis
skills: design-for-test
skills: clock domain crossing
skills: USB 2.0
skills: USB 3.x
skills: Type-C
skills: USB PHY integration
skills: MIPI
skills: PCIe
skills: HDMI
hiring organization: Synopsys
  type: Organization
  ticker symbol: SNPS
  founding date: 1986
job location: Place
  address: PostalAddress
    address locality: Yongin-si
    address region: Gyeonggi-do
    address country: KR
employment type: FULL_TIME