# VLSI Physical Design Engineer **Company**: Hewlett Packard Enterprise **Location**: Ft. Collins, Colorado **Work arrangement**: hybrid **Experience**: mid **Job type**: full-time **Salary**: Annual Salary USD 115,000 - 218,000 in Colorado // 109,000 - 251,000 in Minnesota & Wisconsin **Category**: Engineering **Industry**: Technology **Apply**: https://hpe.wd5.myworkdayjobs.com/en-US/Jobsathpe/job/Ft-Collins-Colorado-United-States-of-America/VLSI-Physical-Design-Engineer_1218237-3?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply **Canonical**: https://yubhub.co/jobs/job_253716e1-ed2 ## Description We are seeking a VLSI Physical Design Engineer to join our team. As a Hybrid role, you will work on average 2 days per week from an HPE office. Responsibilities: - Perform static timing analysis for hierarchical designs at both partition and full-chip levels. - Create, validate, and maintain timing constraints and timing budgets for design and process requirements. - Drive timing closure for partition-level and full-chip designs, including setup, hold, clock, I/O, and test timing. - Analyze timing reports, identify critical paths, and implement fixes to achieve performance, power, and area objectives. - Perform synthesis, netlist quality checks, and formal verification. - Support chip partitioning, floorplanning, and physical design implementation. - Create and manage functional engineering change orders (ECOs). - Develop flow automation and methodology improvements for synthesis, timing analysis, formal verification, physical design, and signoff, often using AI to improve methodologies. - Partner with cross-functional engineering teams to promote physical-design-aware architecture and implementation. - Review design and project activities for compliance with ASIC technology, methodology, and development standards. - Collaborate with external physical design partners to close timing and complete back-end flows. - Provide technical guidance and mentoring to less-experienced engineers and contribute to continuous improvement across the design organization. Education and Experience Required: - Bachelor's or Master's degree in Electrical Engineering, Computer engineering or equivalent - 1-6 years of experience in VLSI design, verification, or implementation Knowledge and Skills: - Strong knowledge of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture - Experience with one or more of the following: static timing analysis and timing signoff, timing constraints and validation, synthesis and netlist quality analysis, formal verification, floorplanning and chip partitioning, ECO implementation - Experience with industry-standard EDA tools, such as Synopsys Fusion Compiler, Design Compiler, PrimeTime, or Formality, and/or Cadence RTL Compiler, Genus, or LEC. - Strong analytical and problem-solving skills. - Strong experience in designing VLSI components, integrated circuitry, architectures and algorithms. - Ability to work independently and collaboratively across multiple engineering disciplines. - Strong knowledge of a programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools. - Strong written and verbal communication skills; mastery in English and local language. Benefits: - Comprehensive suite of benefits that supports physical, financial, and emotional wellbeing - Investment in career development and growth - Unconditional inclusion and celebration of individual uniqueness ## Skills ### Required - VLSI design - verification - implementation - static timing analysis - timing constraints - synthesis - netlist quality analysis - formal verification - floorplanning - chip partitioning - ECO implementation --- Source: [Apply at hpe.wd5.myworkdayjobs.com](https://hpe.wd5.myworkdayjobs.com/en-US/Jobsathpe/job/Ft-Collins-Colorado-United-States-of-America/VLSI-Physical-Design-Engineer_1218237-3?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)