# Senior Physical Design Methodology Engineer(s) - PPA Improvement Technology Scaling

**Company**: NVIDIA
**Location**: Santa Clara, CA
**Experience**: senior
**Job type**: full-time
**Salary**: 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Physical-Design-Methodology-Engineer--PPA-Improvement-Technology-Scaling_JR2028321?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_24cdbec1-1e3

## Description

NVIDIA is looking for Senior Physical Design Methodology Engineers to join their Methodology team. You will craft groundbreaking chips and work in a meaningful, growing, and professional environment.

**Responsibilities:**

- Develop physical design methodologies for implementation of graphics processors and SOCs.

- Create unique solutions to state-of-the-art physical design problems for NVIDIA chips.

- Participate in PPA experiments for testing and developing new technologies for CPUs/GPUs, including running chip floorplan, power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis, and back-end verification.

- Develop automation to solve early design collaterals, such as scripts for analysis of new library cells and modifying design constraints for new technologies.

**Requirements:**

- MS in Electrical or Computer Engineering (or equivalent experience).

- Minimum 5 years of experience in Physical Design Engineering.

- Familiarity with chip design aspects, including floor planning, clock and power distribution, place and route, integration, and verification.

- Experience with physical design related to CPU designs is a plus.

- Strong background in hierarchical design approach, top-down design, budgeting, timing, and physical convergence.

- Familiarity with process-related design issues, including design for yield and manufacturability, EM and IR closure, and thermal management.

- Expertise in industry-standard EDA tools.

- Proficiency in programming and scripting languages, such as Perl, Python, and C++.

**Benefits:**

- Competitive salary: 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

- Equity and benefits package.

## Skills

### Required
- Physical Design Engineering
- Electrical Engineering
- Computer Engineering
- Perl
- Python
- C++
- EDA tools

### Nice to have
- CPU design
- hierarchical design approach
- top-down design
- budgeting
- timing
- physical convergence

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Physical-Design-Methodology-Engineer--PPA-Improvement-Technology-Scaling_JR2028321?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)