# Sr Staff High-Speed I/O Design Engineer **Company**: Synopsys **Location**: Bengaluru, Karnataka **Work arrangement**: onsite **Experience**: senior **Job type**: full-time **Category**: Engineering **Industry**: Technology **Ticker**: SNPS **Wikidata**: https://www.wikidata.org/wiki/Q2303478 **Apply**: https://careers.synopsys.com/job/bengaluru/sr-staff-high-speed-i-o-design-engineer/44408/101087862640?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply **Canonical**: https://yubhub.co/jobs/job_1fc2ddd1-957 ## Description Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. You have spent years designing analog circuits that move data at speeds where physics stops being forgiving and starts being the problem. You know that a high-speed link is not just about transistors, it is about package inductance, substrate coupling, jitter budgets, and the thirty other things that conspire to close an eye diagram at 32 Gbps. You have debugged enough silicon to know that the difference between a working PHY and a failing one often comes down to a decision you made six months earlier during floor planning or bias distribution. At Synopsys, you will design the analog PHY circuits that power UCIe die-to-die interfaces, the kind of IP that gets integrated into chiplets across the industry. The work is hard, the constraints are real, and what you build will ship. ### Responsibilities - Define analog PHY architectures for UCIe and high-speed die-to-die interfaces, translating system requirements into circuit-level specifications for transmitters, receivers, equalization, clocking, and calibration blocks - Design transistor-level analog and mixed-signal circuits including TX drivers, RX front-ends, continuous-time linear equalizers, decision feedback equalizers, delay-locked loops, bias generators, and termination circuits using Cadence Virtuoso, Spectre, Synopsys Custom Compiler, or HSPICE - Build behavioral models for link performance analysis, jitter budgeting, BER estimation, and system-level trade-off exploration in collaboration with digital and signal integrity teams - Verify designs across PVT corners, Monte Carlo mismatch, aging, reliability, and post-layout parasitic extraction, ensuring margin and performance targets are met before tapeout - Analyze package, interposer, substrate, and channel effects including insertion loss, return loss, crosstalk, common-mode voltage, and eye closure, working closely with signal integrity and packaging engineers - Support floor planning, layout reviews, parasitic back-annotation, and design sign-off, ensuring circuits meet area, power, and performance targets - Lead silicon bring-up, lab characterization, compliance testing, and simulation-to-silicon correlation, debugging issues and driving root cause analysis with cross-functional teams ### The Impact You Will Have - Enable Synopsys to deliver UCIe PHY IP that powers the next generation of chiplet-based systems across AI, HPC, and data center applications - Reduce time-to-market for customers by delivering analog circuits that meet first-pass silicon targets for BER, jitter, power, and eye performance - Improve design quality and predictability by building accurate behavioral models and verification methodologies that catch issues before tapeout - Strengthen collaboration between analog, digital, layout, signal integrity, and validation teams through clear communication and early alignment on critical design decisions - Accelerate silicon debug cycles by correlating lab measurements to simulation, identifying root causes faster, and feeding learnings back into the design process - Mentor junior engineers on analog design techniques, high-speed I/O fundamentals, and best practices for verification and silicon bring-up - Contribute to technical reviews, design documentation, and IP release processes that ensure long-term maintainability and reuse across product lines ### Requirements - Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or equivalent practical experience - 8 to 15 years of hands-on experience in analog or mixed-signal IC design, with a focus on high-speed interfaces - Proven track record designing circuits for UCIe, die-to-die interconnects, SerDes, PCIe, Ethernet, CXL, USB, or similar high-speed I/O standards - Deep expertise in analog circuit design including transmitters, receivers, equalization, DLLs, bias circuits, and high-speed drivers, with strong understanding of jitter, phase noise, linearity, signal integrity, and power trade-offs - Strong proficiency with transistor-level design and simulation using Cadence Virtuoso/Spectre, Synopsys Custom Compiler/HSPICE, or equivalent tools - Experience with schematic design, behavioral modeling, layout interaction, parasitic extraction, post-layout verification, and design sign-off in advanced semiconductor process nodes - Hands-on experience with silicon bring-up, lab measurements using high-speed oscilloscopes and BERTs, debugging, and simulation-to-silicon correlation; familiarity with compliance testing and industry standards is a plus ### Benefits - Comprehensive medical and healthcare plans that work for you and your family - In addition to company holidays, we have ETO and FTO Programs - Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more - Purchase Synopsys common stock at a 15% discount, with a 24-month look-back - Save for your future with our retirement plans that vary by region and country - Competitive salaries ## Skills ### Required - analog circuit design - high-speed interfaces - UCIe - die-to-die interconnects - SerDes - PCIe - Ethernet - CXL - USB - Cadence Virtuoso - Spectre - Synopsys Custom Compiler - HSPICE --- Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/bengaluru/sr-staff-high-speed-i-o-design-engineer/44408/101087862640?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)