# Senior Memory System Engineer

**Company**: NVIDIA
**Location**: Santa Clara
**Work arrangement**: hybrid
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Memory-System-Engineer_JR2005335?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_1e290919-c2b

## Description

We are now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team. As a Senior Systems Engineer at NVIDIA, you'll join a group of hardworking engineers to develop and architect innovative Memory Solutions for Tegra SoCs.

In this position, you'll make a real impact in a multifaceted, technology-focused company. You will work with memory controller/PHY and Platform/System architect, Firmware, SI/PI, Memory suppliers to design and architect cutting-edge, high-speed, and lower-power memory technology for NVIDIA CPUs and SOCs.

Responsibilities:

- Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function, and RAS in memory for next-generation SOC and systems.

- Collaborate with ASIC Architects, Designers, Software, and Firmware SW/FW teams to drive memory technology and associated requirements for memory controllers.

- Define Memory module, Package, and PCB layouts appropriate to the system workloads.

- Debug and bring up memory evaluation/validation and failure issues on memory technology.

- Collaborate with DRAM suppliers and industry partners on to develop memory and memory-related component technology.

Requirements:

- Bachelor's degree or master's degree in Electrical Engineering, Computer Engineering (CE), or a related field (or equivalent experience).

- 10 years of proven track record in DRAM design, module design, or memory subsystem design.

- Deep understanding and strong fundamental of memory design, features, ECC algorithm, SI, and PI (Training algorithm) in DDR, LPDDR, and HBM.

- Strong understanding of memory subsystem level interaction with Cache, Memory controller, and PHY.

- Experience in the design, bring-up, and validation for memory failure analysis.

- Experience with Python, C/C++ for development and memory workload analysis.

- Strong user documentation and interpersonal skills.

With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're creative and autonomous, we want to hear from you!

## Skills

### Required
- Python
- C/C++
- DRAM design
- module design
- memory subsystem design
- memory design
- features
- ECC algorithm
- SI
- PI
- DDR
- LPDDR
- HBM
- Cache
- Memory controller
- PHY

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Source: [Apply at nvidia.wd5.myworkdayjobs.com](https://nvidia.wd5.myworkdayjobs.com/en-US/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Memory-System-Engineer_JR2005335?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)