# ASIC Digital Design Verification, Principal Engineer

**Company**: Synopsys
**Location**: Reading, England, United Kingdom
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/reading/asic-digital-design-verification-principal-engineer/44408/91341925232
**Canonical**: https://yubhub.co/jobs/job_1c50fc58-cb7

## Description

We are seeking a highly skilled ASIC Digital Design Verification, Principal Engineer to join our team. As a Principal Engineer, you will be responsible for designing and implementing verification environments to ensure the correctness of Interface IP protocols. You will collaborate with design and architecture teams to identify and fix bugs, and perform all tasks related to verifying a complex digital IP, including detailed test plans, functional coverage analysis, and driving coverage closure.

## Skills

### Required
- digital design and verification methodologies
- System Verilog
- UVM
- SVA
- Python or Perl for automation

### Nice to have
- scripting languages
- advanced verification techniques