# ASIC Design Engineer

**Company**: Hewlett Packard Enterprise
**Location**: Bengaluru, Karnātaka
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology

**Apply**: https://hpe.wd5.myworkdayjobs.com/en-US/Jobsathpe/job/Bengaluru-Karntaka-India/ASIC-Design-Engineer_1207294-2?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_1b044e9d-f5c

## Description

We are seeking an ASIC Design Engineer to join our team. As an ASIC Design Engineer, you will define and architect high-performance blocks for the latest, most advanced networking ASICs.

Responsibilities:

- Define and architect high-performance blocks for the latest, most advanced networking ASICs.

- Perform micro-architecture and RTL logic design to maximize throughput while minimizing power consumption.

- Collaborate with the verification team to develop test plans and debug test failures.

- Work closely with the physical design team to develop timing constraints, analyze timing violations, and implement timing fixes.

Requirements:

- Bachelor's or Master's degree in Electrical Engineering (BSEE/MSEE).

- 5+ years of experience in ASIC design.

- Strong Verilog RTL coding skills.

- Knowledge of Synopsys Design Compiler, Verplex LEC, and SpyGlass (preferred).

- Experience designing networking ASICs supporting protocols such as Ethernet and FCoE is a plus.

- Knowledge of high-performance memory subsystems.

- Understanding of multi-clock domain synchronization and high-speed serial interfaces.

- Strong problem-solving and ASIC debugging skills.

- Excellent written and verbal communication skills.

Benefits:

- Comprehensive suite of benefits that supports physical, financial, and emotional wellbeing.

- Investment in your career through specific programs catered to helping you reach your career goals.

- Unconditional inclusion and celebration of individual uniqueness.

## Skills

### Required
- Electrical Engineering
- ASIC design
- Verilog RTL coding
- Synopsys Design Compiler
- Verplex LEC
- SpyGlass
- Ethernet
- FCoE
- high-performance memory subsystems
- multi-clock domain synchronization
- high-speed serial interfaces

### Nice to have
- Experience designing networking ASICs supporting protocols such as Ethernet and FCoE

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Source: [Apply at hpe.wd5.myworkdayjobs.com](https://hpe.wd5.myworkdayjobs.com/en-US/Jobsathpe/job/Bengaluru-Karntaka-India/ASIC-Design-Engineer_1207294-2?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)