# Sr. Staff Digital Verification Engineer (Memory Interface IP- HBM/DDR/LPDDR)

**Company**: Synopsys
**Location**: Hyderabad, Telangana
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/hyderabad/sr-staff-digital-verification-engineer-memory-interface-ip-hbm-ddr-lpddr/44408/100624924000?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_16da21ca-4e0

## Description

You will be a Sr. Staff Digital Verification Engineer at Synopsys, working on Memory Interface IP, specifically HBM, DDR, and LPDDR.

As a senior engineer, you have spent over a decade verifying complex ASIC designs and have extensive experience with memory interfaces.

Your responsibilities will include:

- Designing and building verification environments for Interface IP protocols using SystemVerilog and UVM

- Writing detailed test plans that cover functional scenarios, corner cases, and protocol compliance

- Developing reusable verification IP and testbenches that can be adapted across multiple projects and IP variants

- Working directly with design and architecture teams to identify bugs and close coverage gaps

- Running functional coverage analysis and driving coverage closure

- Mentoring junior verification engineers on UVM best practices and verification strategy

You will have the opportunity to work on cutting-edge Interface IP solutions, deliver high-quality products, and shape the verification methodology and standards for future memory IP products.

The ideal candidate has:

- 6-8+ years of hands-on ASIC or SoC verification experience

- Proven track record verifying Interface IP protocols such as HBM, DDR, LPDDR, or AMBA

- Strong proficiency in SystemVerilog and UVM

- Deep understanding of digital design concepts, timing, protocol compliance, and memory subsystem architecture

- Experience using simulation tools like VCS or ModelSim

We offer a comprehensive range of health, wellness, and financial benefits, including medical and healthcare plans, time away, family support, ESPP, retirement plans, and competitive salaries.

## Skills

### Required
- SystemVerilog
- UVM
- ASIC verification
- HBM
- DDR
- LPDDR
- AMBA
- VCS
- ModelSim

### Nice to have
- HBM2
- HBM3
- DDR4
- DDR5
- LPDDR4
- LPDDR5

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/hyderabad/sr-staff-digital-verification-engineer-memory-interface-ip-hbm-ddr-lpddr/44408/100624924000?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)