# Digital Design Verification Engineering Internship (16-Month Co-op)

**Company**: Synopsys
**Location**: Mississauga, Ontario
**Work arrangement**: hybrid
**Job type**: internship
**Salary**: $0-$0
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/mississauga/digital-design-verification-engineering-internship-16-month-co-op/44408/100144992768?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_11f7dd7a-278

## Description

Our internship programs offer real-world projects, hands-on experience, and opportunities to collaborate with passionate teams globally.

As a Digital Design Verification Engineering Intern, you'll be involved in verifying current and next-generation Backplane Ethernet, PCIe, SATA, USB 2/3, and MIPI CPHY/DPHY SERDES products.

Your day-to-day responsibilities will include:

- Defining and tracking Verification Testplans to ensure comprehensive coverage of design functionality

- Designing and writing constrained-random SystemVerilog testbenches using UVM (Universal Verification Methodology) and directed testbenches for ATE/Customer applications

- Creating and examining Functional Coverage and writing SystemVerilog assertions to validate design behavior

- Debugging RTL and gate-level simulation failures, performing Code Coverage Analysis and Closure, and tracking bugs using tools such as Jira

- Leveraging AI to enhance verification tasks and workflows, gaining hands-on experience with cutting-edge technologies while collaborating with design engineers in Portugal and verification teams in Cairo

You'll need:

- Currently pursuing a Bachelor's degree in Computer Engineering, Electrical Engineering, or a related discipline with previous co-op or internship experience

- Strong interest in digital design and verification, supported by relevant coursework

- Proficiency in scripting languages like Perl or Python

- Comprehensive knowledge of Verilog and/or SystemVerilog language

- Basic proficiency with Unix/Linux shell environments

- Confident communication and initiative – you're comfortable asking questions, connecting with team members across different time zones and locations, and proactively seeking guidance when encountering challenges

- Independent and resourceful – we're looking for interns who take ownership of their work, remove their own blockers, and actively pursue learning and growth opportunities

## Skills

### Required
- SystemVerilog
- UVM
- Verilog
- Perl
- Python
- Unix/Linux

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/mississauga/digital-design-verification-engineering-internship-16-month-co-op/44408/100144992768?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)