# Principal Digital Verification Engineer (Memory Interface IP- HBM/DDR/LPDDR)

**Company**: Synopsys
**Location**: Hyderabad, Telangana
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/hyderabad/principal-digital-verification-engineer-memory-interface-ip-hbm-ddr-lpddr/44408/100624923968?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_0f8c62bf-f4f

## Description

You will be a Principal Digital Verification Engineer at Synopsys, focusing on Memory Interface IP, specifically HBM, DDR, and LPDDR.

As a seasoned verification expert with over a decade of experience, you will design and build verification environments for Interface IP protocols using SystemVerilog and UVM. You will work closely with design and architecture teams to identify bugs, clarify specifications, and close coverage gaps before tapeout.

Your responsibilities will include:

- Designing and building verification environments for Interface IP protocols including HBM, DDR, LPDDR, and AMBA

- Writing detailed test plans covering functional scenarios, corner cases, and protocol compliance

- Developing reusable verification IP and testbenches adaptable across multiple projects and IP variants

- Collaborating with design and architecture teams to identify bugs and close coverage gaps

- Running functional coverage analysis and driving coverage closure

- Mentoring junior verification engineers on UVM best practices and verification strategy

You will need:

- 8-10+ years of hands-on ASIC or SoC verification experience

- Proven track record verifying Interface IP protocols such as HBM, DDR, LPDDR, or AMBA

- Strong proficiency in SystemVerilog and UVM

- Deep understanding of digital design concepts, timing, protocol compliance, and memory subsystem architecture

- Experience with simulation tools like VCS or ModelSim

In return, you will have the opportunity to deliver Interface IP that powers memory subsystems in AI accelerators, mobile SoCs, and high-performance computing platforms. You will contribute to reducing post-silicon bugs and customer escalations by catching issues early through rigorous verification and coverage-driven testing.

The team you will be part of is highly skilled and motivated, focused on delivering cutting-edge Interface IP solutions. You will have the chance to work alongside industry experts and contribute to the development of next-generation technologies.

Synopsys offers a comprehensive range of health, wellness, and financial benefits.

## Skills

### Required
- SystemVerilog
- UVM
- HBM
- DDR
- LPDDR
- AMBA
- VCS
- ModelSim

### Nice to have
- HBM2
- HBM3
- DDR4
- DDR5
- LPDDR4
- LPDDR5

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/hyderabad/principal-digital-verification-engineer-memory-interface-ip-hbm-ddr-lpddr/44408/100624923968?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)