# Analog Design, Staff Engineer

**Company**: Synopsys
**Location**: Yerevan
**Experience**: staff
**Job type**: employee
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/yerevan/analog-design-staff-engineer/44408/96474803008?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_0ea3486c-df3

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You have spent years deep in transistor-level design, building circuits that close timing, meet power budgets, and survive silicon. At Synopsys, you will work on SerDes PHY IP that ships in real products, with a team in Yerevan that takes this work seriously.

### Responsibilities

- Design and verify transistor-level analog and mixed-signal circuits for high-speed SerDes PHY IP, including transmitters, receivers, PLLs, DLLs, VCOs, equalizers, and bias circuits

- Develop circuit architectures and run tradeoff analysis across performance, power, noise, jitter, and reliability

- Execute DC, AC, transient, cross-corner PVT, aging, EMIR/SHE, and Monte Carlo simulations to validate robustness

- Build and validate circuit simulation models and Verilog-A behavioral models for IP integration

- Review custom layout implementations and collaborate with layout engineers to ensure post-layout performance meets spec

- Prepare technical documentation, lead design reviews, and present tradeoff decisions to cross-functional teams

- Mentor junior engineers and provide technical guidance on circuit design, simulation methodology, and debugging

### The Impact You Will Have

- Your circuit architecture will define the performance envelope for SerDes PHY IP used in high-speed communication products

- Your simulation rigor will reduce post-silicon surprises and accelerate time to market

- The models you develop will enable system-level validation for customers, building next-generation AI and data center platforms

- Your layout reviews will catch issues that would otherwise surface in silicon, saving months of debug

### Requirements

- BS or MS in Electrical Engineering or Electronics Engineering

- 4+ years of hands-on experience in analog and mixed-signal IC design in advanced CMOS technology nodes

- Deep expertise in transistor-level design, custom IC design flow, and layout effects including parasitics, matching, and proximity

- Proven experience designing and verifying transmitters, receivers, PLLs, DLLs, VCOs, equalizers, samplers, and reference circuits for high-speed SerDes or similar applications

- Strong simulation skills across DC/AC/Transient, cross-corner PVT, aging, EMIR/SHE, and Monte Carlo methods

- Experience developing circuit simulation models and Verilog-A behavioral models

- Proficiency with scripting using TCL, Python, Perl, MATLAB, or C.

- Experience with AI tools for design automation is a plus

### Benefits

- Comprehensive medical and healthcare plans that work for you and your family

- In addition to company holidays, we have ETO and FTO Programs

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more

- Purchase Synopsys common stock at a 15% discount, with a 24-month look-back

- Save for your future with our retirement plans that vary by region and country

- Competitive salaries

## Skills

### Required
- analog and mixed-signal IC design
- transistor-level design
- custom IC design flow
- layout effects
- parasitics
- matching
- proximity
- SerDes PHY IP
- DC/AC/Transient simulation
- cross-corner PVT
- aging
- EMIR/SHE
- Monte Carlo methods
- circuit simulation models
- Verilog-A behavioral models
- scripting using TCL, Python, Perl, MATLAB, or C

### Nice to have
- AI tools for design automation

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Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/yerevan/analog-design-staff-engineer/44408/96474803008?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)
