# Hardware Engineering, Sr Staff Engineer

**Company**: Synopsys
**Work arrangement**: remote
**Experience**: senior
**Job type**: full-time
**Salary**: $141000-$211000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/united-states/hardware-engineering-sr-staff-engineer-19027/44408/101338136496?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_0a8e671b-806

## Description

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You are a seasoned engineer with over 8+ years of experience in DDR/HBM SIPI engineering. You possess a deep understanding of high-speed interface signaling operations, including s-parameters, channel loss, crosstalk, equalization techniques, jitter, and power delivery modeling. Your expertise in signal and power integrity analysis methods, such as eye diagram construction through statistical modeling, return loss, impedance matching, and resonant system analysis, is unmatched.

**Responsibilities:**

- Perform interconnect assessments using the latest modeling techniques to predict channel data rates and signal margins.

- Assess strategies for system performance optimization, including signal margins, power, and FFE, DFE, and CTLE equalization techniques.

- Assess power delivery systems to optimize power integrity for supply stability and jitter minimization.

- Document findings in reports and design guidelines.

- Communicate results and insights to design teams to improve PHY design.

- Communicate results and recommendations to customers to enable them to optimize their system performance.

- Interact with design teams and customers to refine and apply signal and power analysis methods to refine strategies and address problems.

- Understand Synopsys’ DDR and HBM PHY roadmap and create strategies for improved performance.

- Track industry developments through activities at standards committees and through memory vendor roadmaps.

**Requirements:**

- Proven understanding of high-speed interface signaling operation, such as s-parameters, channel loss, crosstalk, equalization techniques, jitter, and power delivery modeling.

- Well-versed in signal and power delivery analysis methods, including eye diagram construction through statistical modeling, return loss, impedance matching, and resonant system analysis.

- Ability to use HFSS and Ansys tools, HSPICE, Raptor, and ADS.

- Skilled in generating and communicating results, findings, conclusions, and recommendations within a design team and to external customers.

- Knowledgeable in board-level construction and on-chip IO design operation.

**Benefits:**

- Comprehensive medical and healthcare plans that work for you and your family.

- In addition to company holidays, we have ETO and FTO Programs.

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

- Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.

- Save for your future with our retirement plans that vary by region and country.

- Competitive salaries.

## Skills

### Required
- HFSS
- Ansys
- HSPICE
- Raptor
- ADS
- DDR/HBM SIPI engineering
- high-speed interface signaling operations
- signal and power integrity analysis

---

Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/united-states/hardware-engineering-sr-staff-engineer-19027/44408/101338136496?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)