# R&D Engineering, Sr Staff Engineer

**Company**: Synopsys
**Location**: Marlborough
**Work arrangement**: onsite
**Experience**: senior
**Job type**: full-time
**Salary**: $144,000-$216,000
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/marlborough/r-and-d-engineering-sr-staff-engineer/44408/92995225280
**Canonical**: https://yubhub.co/jobs/job_0a4ec9ca-dcb

## Description

You are a seasoned engineering professional with a passion for performance optimization and a drive to push technological boundaries. You thrive in environments where your deep understanding of C++ and Compilers can be leveraged to architect solutions that fundamentally enhance Verilog/SystemVerilog simulation speed and reliability.

You are excited by the challenge of exploring new multi-core HW accelerators like GPU, and you understand the critical role that simulation performance plays in the "shift-left" strategy for global semiconductor leaders. Your expertise enables you to tackle complex problems, and you are adept at integrating modern AI-powered development tools to accelerate productivity and automate repetitive tasks.

You believe in collaboration and mentorship, actively sharing knowledge with junior engineers and engaging with distributed R&D teams to foster innovation. You are committed to continuous learning, staying ahead of industry trends and embracing new technologies that can drive impact. Your communication skills are strong, enabling you to articulate technical concepts across diverse audiences and contribute to a culture of inclusivity and excellence.

**Responsibilities:**

- Architecting and optimizing high-performance simulation engine kernels for the Synopsys VCS RTL simulator using advanced C++ techniques.

- Exploring and implementing GPU or other acceleration strategies with CUDA to significantly reduce simulation runtimes for customers.

- Leveraging deep knowledge of Verilog/SystemVerilog LRM to ensure accurate and reliable simulation across diverse design environments.

- Integrating Using AI-powered tools (such as Cursor, GitHub Copilot, and generative AI assistants) to automate code generation and debugging processes.

- Mentoring and guiding junior engineers, fostering skills development and technical growth within the team.

- Collaborating with distributed R&D teams to maintain Synopsys' leadership and drive innovation in the EDA industry.

- Analyzing performance bottlenecks and proposing architectural improvements to enable "shift-left" verification strategies for global semiconductor customers.

**Impact:**

- Accelerate verification cycles for leading semiconductor companies, enabling faster time-to-market for complex AI and SoC designs.

- Drive the evolution of the world's fastest Verilog simulator, setting new industry standards for performance and reliability.

- Empower customers to achieve greater productivity and efficiency through advanced simulation capabilities and reduced runtimes.

- Strengthen Synopsys' position as the global leader in EDA tools by delivering innovative, high-impact solutions.

- Mentor and inspire the next generation of engineers, fostering a culture of technical excellence and collaboration.

- Champion the adoption of AI-powered development workflows, transforming the way R&D teams approach code generation and debugging.

**Requirements:**

- 8-10 years or more of relevant experience.

- Expert-level proficiency in C++ with proven experience in performance-critical software development.

- Deep understanding of Verilog/SystemVerilog Language Reference Manuals (LRM) and simulation methodologies.

- Hands-on experience with GPU/CUDA programming or other HW accelerators.

- Familiarity with AI-powered development tools such as Cursor, GitHub Copilot, and generative AI assistants.

- Strong architectural design skills and ability to analyze and optimize complex software systems.

- Experience in mentoring and guiding junior engineers within an R&D environment.

**Benefits:**

- Comprehensive medical and healthcare plans that work for you and your family.

- In addition to company holidays, we have ETO and FTO Programs.

- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

- Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

- Save for your future with our retirement plans that vary by region and country.

- Competitive salaries.

## Skills

### Required
- C++
- Compilers
- Verilog/SystemVerilog
- GPU/CUDA
- AI-powered development tools