# Post-Silicon Validation Engineer

**Company**: Cisco
**Location**: San Jose, California
**Experience**: senior
**Job type**: full-time
**Salary**: $167,700.00 to $245,200.00
**Category**: Engineering
**Industry**: Technology

**Apply**: https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/Senior-ASIC-Engineer---Post-Silicon-Validation_2020831-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/jobs/job_07a22c94-899

## Description

The Silicon One team at Cisco creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally.

As a Post-Silicon Validation Engineer, you will be responsible for:

- Planning and setting up Silicon Bring-up infrastructure, including system boot, initialization, and Power-On of ASICs.

- Working closely with design, verification, and board teams to root-cause and resolve functional and electrical issues.

- Preparing the Validation Test plan and executing functional and performance testing targeting IP, Subsystem, and full-chip stress testing and corner case analysis.

- Developing and extending post-silicon validation infrastructure, automation, and test suites, including implementing efficient result capture, analysis, and regression frameworks.

- Applying expertise with lab instrumentation (oscilloscopes, analyzers, traffic generators) as part of validation and characterization.

- Working closely with RTL, DFT, ATE, firmware, and system architecture teams to ensure a smooth transition from pre-silicon verification to post-silicon validation.

- Providing critical feedback on test escapes, yield issues, and silicon errata, influencing silicon revisions and firmware/driver workarounds.

The minimum qualifications for this role are:

- Bachelor's degree in Electrical or Computer Engineering and 7+ years experience; a Master's degree with 4+ years of experience; or a PhD with 1+ years of experience.

- Prior experience in post-silicon validation, bring-up, and debug with ASICs.

- Prior experience in early silicon bring-up, debug, and validation.

- Prior experience bringing up standard peripheral interfaces (I2C, SPI, JTAG) and protocols (PCIe, Ethernet).

- Prior experience working with firmware, bootloaders, and low-level silicon debug environments; fluency in C, Python, and scripting for validation automation.

The preferred qualifications for this role are:

- Experience with memory subsystems (HBM, DDR).

- Electrical and thermal performance characterization activities.

- System Verilog/UVM-based verification and emulation-based verification.

In terms of benefits, Cisco offers:

- Medical, dental, and vision insurance

- A 401(k) plan with a Cisco matching contribution

- Paid parental leave

- Short and long-term disability coverage

- Basic life insurance

- Paid time away, including 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

- 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness

- Non-exempt employees receive 16 days of paid vacation time per full calendar year

- Exempt employees participate in Cisco’s flexible vacation time off program

- 80 hours of sick time off provided on hire date and each January 1st thereafter

- Optional 10 paid days per full calendar year to volunteer

## Skills

### Required
- ASICs
- post-silicon validation
- bring-up
- debug
- C
- Python
- scripting
- I2C
- SPI
- JTAG
- PCIe
- Ethernet
- firmware
- bootloaders
- low-level silicon debug environments

### Nice to have
- memory subsystems (HBM, DDR)
- electrical and thermal performance characterization
- System Verilog/UVM-based verification
- emulation-based verification

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Source: [Apply at cisco.wd5.myworkdayjobs.com](https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/San-Jose-California-US/Senior-ASIC-Engineer---Post-Silicon-Validation_2020831-1?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)