# DFT Application Engineer, Staff Level

**Company**: Synopsys
**Location**: Bengaluru, Karnataka
**Experience**: staff
**Category**: Engineering
**Industry**: Technology
**Ticker**: SNPS
**Wikidata**: https://www.wikidata.org/wiki/Q2303478

**Apply**: https://careers.synopsys.com/job/bengaluru/dft-application-engineer-staff-level/44408/103151436656?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply
**Canonical**: https://yubhub.co/job/dft-application-engineer-staff-level-07310cc4-282/

## Description

Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing.

You have spent years in the trenches of digital IC design, and somewhere along the way you realized that the most elegant RTL in the world means nothing if you cannot test it in silicon.

At Synopsys, you will work on real designs with real stakes, supporting customers who depend on your expertise to get their chips out the door.

### Responsibilities

- Deliver end-to-end DFT solutions for customer designs ranging from mid-complexity ASICs to massive multi-IP SoCs, covering architecture planning, scan insertion, ATPG pattern generation, MBIST integration, and silicon bring-up support

- Provide technical guidance during early design phases, helping customers budget for test, plan DFT architectures, and avoid costly mistakes before RTL freeze

- Implement and validate scan, MBIST, and IEEE 1687 test solutions, running simulations, debugging failures, and ensuring coverage targets are met

- Join customer design reviews to understand their flows, identify gaps or risks, and recommend improvements grounded in real-world test methodology

- Prototype and validate next-generation DFT techniques in collaboration with solution architects, turning experimental ideas into production-ready workflows

- Deliver technical support that goes beyond ticket resolution: training sessions, flow optimization, account-level strategy, and diagnostics deep dives that build long-term customer trust

- Run product evaluations, competitive benchmarks, and live demos that help win new accounts and expand Synopsys footprint in automotive, consumer, and high-performance compute markets

### The Impact You Will Have

- You enable first-time silicon success for customers by delivering robust, validated DFT solutions that catch defects before tapeout and streamline bring-up after fabrication

- You accelerate adoption of advanced test standards like IEEE 1687 and next-generation MBIST across industries where reliability is non-negotiable, including automotive and safety-critical applications

- You strengthen Synopsys' reputation as the go-to partner for test by consistently delivering measurable value: higher coverage, faster debug, shorter time to market

- You shape the future of DFT methodology by prototyping new approaches, validating them on real customer designs, and feeding insights back into product roadmaps

- You improve customer design flows in ways that compound over time, turning one-off wins into repeatable best practices that raise the bar across their engineering teams

- You transfer knowledge through training, documentation, and technical presentations that make customers and colleagues more capable and self-sufficient

- You contribute to competitive wins by demonstrating clear technical advantages in benchmarks and evaluations that matter to decision-makers

### Requirements

- Bachelor's degree with 7+ years of hands-on experience, or Master's degree with 5+ years, in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related discipline

- Deep practical experience with RTL coding, DFT insertion flows, ATPG tools, and silicon bring-up, you have done this work yourself, not just managed it

- Strong command of scan architectures, fault models, pattern generation, simulation, and test access mechanisms across complex hierarchical designs

- Proven ability to handle DFT for large SoCs with multiple IP blocks, mixed clock domains, and challenging coverage requirements

- Working knowledge of IEEE 1149.1 (JTAG), IEEE 1500 (embedded core test), and IEEE 1687 (IJTAG) standards and how they apply in real designs

- Exposure to MBIST in automotive or safety-critical design environments is a strong plus, especially if you have worked with ISO 26262 or functional safety requirements

- Clear, confident communication skills for both technical deep dives with engineers and higher-level strategy conversations with program managers or executives

### Benefits

- Comprehensive medical and healthcare plans that work for you and your family

- Time away: company holidays, ETO and FTO Programs

- Family support: maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more

- ESPP: purchase Synopsys common stock at a 15% discount, with a 24-month look-back

- Retirement plans: save for your future with our retirement plans that vary by region and country

- Competitive salaries

For more fresh new jobs, check out [yubhub.co](https://yubhub.co/).

## Skills

### Required
- RTL coding
- DFT insertion flows
- ATPG tools
- silicon bring-up
- scan architectures
- fault models
- pattern generation
- simulation
- test access mechanisms
- IEEE 1149.1 (JTAG)
- IEEE 1500 (embedded core test)
- IEEE 1687 (IJTAG)

### Nice to have
- MBIST
- automotive or safety-critical design environments
- ISO 26262 or functional safety requirements

---

Source: [Apply at careers.synopsys.com](https://careers.synopsys.com/job/bengaluru/dft-application-engineer-staff-level/44408/103151436656?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply)
